Architecture design of small Reed-Solomon decoder by Berlekamp-Massey algorithm


The Transactions of the Korea Information Processing Society (1994 ~ 2000), Vol. 7, No. 1, pp. 306-312, Jan. 2000
10.3745/KIPSTE.2000.7.1.306,   PDF Download:

Abstract

In this paper, the efficient architecture of small Reed-solomon architecture is suggested. Here, 3-stage pipeline is adopted. In decoding, error-location polynomials are obtained by BMA using fast iteration method, and syndrome polynomials, where calculation complexity is required, are obtained by parallel calculation using ROM table, and the roots of error location polynomial are calculated by ROM table using Chein search algorithm. In the suggested decoder, it is confirmed that 3 symbol random errors can be corrected and 124Mbps decoding rate is obtained using 25 Mhz system clock.


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Cite this article
[IEEE Style]
W. H. Chun and N. U. Song, "Architecture design of small Reed-Solomon decoder by Berlekamp-Massey algorithm," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 7, no. 1, pp. 306-312, 2000. DOI: 10.3745/KIPSTE.2000.7.1.306.

[ACM Style]
Woo Hyung Chun and Nag Un Song. 2000. Architecture design of small Reed-Solomon decoder by Berlekamp-Massey algorithm. The Transactions of the Korea Information Processing Society (1994 ~ 2000), 7, 1, (2000), 306-312. DOI: 10.3745/KIPSTE.2000.7.1.306.