Performance Improvement of Operand Fetching with the Operand Reference Prediction Cache(ORPC)


The Transactions of the Korea Information Processing Society (1994 ~ 2000), Vol. 5, No. 6, pp. 1652-1659, Jun. 1998
10.3745/KIPSTE.1998.5.6.1652,   PDF Download:

Abstract

To provide performance gains by reducing the operand referencing latency and data cache bandwidth requirements, we present an operand reference prediction cache (ORPC) which predicts operand value and address translation during the instruction fetch stage. The prediction is verified in the early stage, and thus it minimizes the performance penalty caused by the misprediction. Through the trace-driven simulation of six benchmark programs, the performance improvement by proposed three ORPC structures (ORPC1, ORPC2, ORPC3) is analysed and validated.


Statistics
Show / Hide Statistics

Statistics (Cumulative Counts from September 1st, 2017)
Multiple requests among the same browser session are counted as one view.
If you mouse over a chart, the values of data points will be shown.


Cite this article
[IEEE Style]
K. H. Jun and C. K. San, "Performance Improvement of Operand Fetching with the Operand Reference Prediction Cache(ORPC)," The Transactions of the Korea Information Processing Society (1994 ~ 2000), vol. 5, no. 6, pp. 1652-1659, 1998. DOI: 10.3745/KIPSTE.1998.5.6.1652.

[ACM Style]
Kim Heung Jun and Cho Kyung San. 1998. Performance Improvement of Operand Fetching with the Operand Reference Prediction Cache(ORPC). The Transactions of the Korea Information Processing Society (1994 ~ 2000), 5, 6, (1998), 1652-1659. DOI: 10.3745/KIPSTE.1998.5.6.1652.