Structure of Low-Power MOS Current-Mode Logic Circuit with Sleep-Transistor
The KIPS Transactions:PartA, Vol. 15, No. 2, pp. 69-74, Apr. 2008
10.3745/KIPSTA.2008.15.2.69, PDF Download:
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Cite this article
[IEEE Style]
J. B. Kim, "Structure of Low-Power MOS Current-Mode Logic Circuit with Sleep-Transistor," The KIPS Transactions:PartA, vol. 15, no. 2, pp. 69-74, 2008. DOI: 10.3745/KIPSTA.2008.15.2.69.
[ACM Style]
Jeong Beom Kim. 2008. Structure of Low-Power MOS Current-Mode Logic Circuit with Sleep-Transistor. The KIPS Transactions:PartA, 15, 2, (2008), 69-74. DOI: 10.3745/KIPSTA.2008.15.2.69.