New Division Circuit for GF(2(m)) Applications


The KIPS Transactions:PartA, Vol. 12, No. 3, pp. 235-242, Jun. 2005
10.3745/KIPSTA.2005.12.3.235,   PDF Download:

Abstract

In this paper, we propose a new division circuit for GF(2^m) applications. The proposed division circuit is based on a modified the binary GCD algorithm, and produce division results at a rate of one per 2m-1 clock cycles. Analysis shows that the proposed circuit gives 47% and 20% improvements in terms of speed and hardware respectively. In addition, since the proposed circuit does not restrict the choice of irreducible polynomials and has regularity and modularity, it provides a high flexibility and scalability with respect to the field size m. Thus, the proposed divider is well suited to low-area GF(2^m) applications.


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Cite this article
[IEEE Style]
C. H. Kim, N. G. Lee, S. H. Kwon, C. P. Hong, "New Division Circuit for GF(2(m)) Applications," The KIPS Transactions:PartA, vol. 12, no. 3, pp. 235-242, 2005. DOI: 10.3745/KIPSTA.2005.12.3.235.

[ACM Style]
Chang Hoon Kim, Nam Gon Lee, Soon Hak Kwon, and Chun Pyo Hong. 2005. New Division Circuit for GF(2(m)) Applications. The KIPS Transactions:PartA, 12, 3, (2005), 235-242. DOI: 10.3745/KIPSTA.2005.12.3.235.