Design of Multiple - Valued Logic Circuits on Reed - Muller Expansions Using Perfect Shuffle
The KIPS Transactions:PartA, Vol. 9, No. 3, pp. 271-280, Sep. 2002
10.3745/KIPSTA.2002.9.3.271, PDF Download:
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Cite this article
[IEEE Style]
H. K. Seong, "Design of Multiple - Valued Logic Circuits on Reed - Muller Expansions Using Perfect Shuffle," The KIPS Transactions:PartA, vol. 9, no. 3, pp. 271-280, 2002. DOI: 10.3745/KIPSTA.2002.9.3.271.
[ACM Style]
Hyeon Kyeong Seong. 2002. Design of Multiple - Valued Logic Circuits on Reed - Muller Expansions Using Perfect Shuffle. The KIPS Transactions:PartA, 9, 3, (2002), 271-280. DOI: 10.3745/KIPSTA.2002.9.3.271.