A Performance Evaluation of Circuit Minimization Algorithms for Mentorship Education of Informatics Gifted Secondary Students


KIPS Transactions on Computer and Communication Systems, Vol. 4, No. 12, pp. 391-398, Dec. 2015
10.3745/KTCCS.2015.4.12.391,   PDF Download:

Abstract

This paper devises a performance improvement and evaluation process of circuit minimization algorithms for mentorship education of distinguished informatics gifted secondary students. In the process, students learn that there are several alternative equivalent circuits for a target function and recognize the necessity for formalized circuit minimization methods. Firstly, they come at the concept of circuit minimization principle from Karnaugh Map which is a manual methodology. Secondly, they explore Quine-McCluskey algorithm which is a computational methodology. Quine-McCluskey algorithm``s time complexity is high because it uses set operations. To improve the performance of Quine-McCluskey algorithm, we encourage them to adopt a bit-wise data structure instead of integer array for sets. They will eventually see that the performance achievement is about 36%. The ultimate goal of the process is to enlarge gifted students`` interest and integrated knowledge about computer science encompassing electronic switches, logic gates, logic circuits, programming languages, data structures and algorithms.


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Cite this article
[IEEE Style]
H. B. Lee and K. H. Kwon, "A Performance Evaluation of Circuit Minimization Algorithms for Mentorship Education of Informatics Gifted Secondary Students," KIPS Transactions on Computer and Communication Systems, vol. 4, no. 12, pp. 391-398, 2015. DOI: 10.3745/KTCCS.2015.4.12.391.

[ACM Style]
Hyung Bong Lee and Ki Hyeon Kwon. 2015. A Performance Evaluation of Circuit Minimization Algorithms for Mentorship Education of Informatics Gifted Secondary Students. KIPS Transactions on Computer and Communication Systems, 4, 12, (2015), 391-398. DOI: 10.3745/KTCCS.2015.4.12.391.