A Gain Enhancing Scheme for Op-Amp in High Performance AIPS Using Negative Resistance Element


The KIPS Transactions:PartA, Vol. 12, No. 6, pp. 531-538, Dec. 2005
10.3745/KIPSTA.2005.12.6.531,   PDF Download:

Abstract

In the high performance Analog Information Processing Systems(AIPS), gain boosting or additional gain stage is required when the gain is not sufficient with one stage amplification. This work shows that high gain is neatly obtained by enhancing the gain using the negative resistance element. Compared to the conventional techniques, the proposed scheme enjoys full output swing, small circuit area and power consumption, and the applications to various configurations of amplifiers. The negative resistance element is placed between the differential output nodes when used in the Op-Amp. The HSPICE simulation indicates that enhancement of more than 40 dB is readily obtained in this simple configuration when the negative resistance element is implemented in the form of cross-coupled CMOS inverters.


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Cite this article
[IEEE Style]
K. M. Chung and S. M. Kim, "A Gain Enhancing Scheme for Op-Amp in High Performance AIPS Using Negative Resistance Element," The KIPS Transactions:PartA, vol. 12, no. 6, pp. 531-538, 2005. DOI: 10.3745/KIPSTA.2005.12.6.531.

[ACM Style]
Kang Min Chung and Sung Mook Kim. 2005. A Gain Enhancing Scheme for Op-Amp in High Performance AIPS Using Negative Resistance Element. The KIPS Transactions:PartA, 12, 6, (2005), 531-538. DOI: 10.3745/KIPSTA.2005.12.6.531.