Digital Library
Search: "[ keyword: Processor ]" (53)
Context Script Language and Language Processor for Context-Awareness in Ubiquitous Computing
Choon Bo Shim , Young Ki Kim , Jae Woo Chang , Jeong Ki Kim The KIPS Transactions:PartA,
Vol. 11, No. 7, pp. 537-546,
Dec.
2004
10.3745/KIPSTA.2004.11.7.537
10.3745/KIPSTA.2004.11.7.537
A Heuristic Load Balancing Algorithm by using Iterative Load Transfer
Eui Seok Song , Ha Ryung Oh , Yeong Rak Seong The KIPS Transactions:PartA,
Vol. 11, No. 7, pp. 499-510,
Dec.
2004
10.3745/KIPSTA.2004.11.7.499
10.3745/KIPSTA.2004.11.7.499
An efficient interconnection network topology in dual-link CC-NUMA systems
Seo Hyo Jung The KIPS Transactions:PartA,
Vol. 11, No. 1, pp. 49-56,
Feb.
2004
10.3745/KIPSTA.2004.11.1.49
10.3745/KIPSTA.2004.11.1.49
Design and Evaluation of 32-Bit RISC-V Processor Using FPGA
Sungyeong Jang, Sangwoo Park, Guyun Kwon, Taeweon Suh KIPS Transactions on Computer and Communication Systems,
Vol. 11, No. 1, pp. 1-8,
Jan.
2022
https://doi.org/10.3745/KTCCS.2022.11.1.1
Keywords: RISC-V, FPGA, Processor
https://doi.org/10.3745/KTCCS.2022.11.1.1
Keywords: RISC-V, FPGA, Processor
Optimized Implementation of Block Cipher PIPO in Parallel-Way on 64-bit ARM Processors
Si Woo Eum, Hyeok Dong Kwon, Hyun Jun Kim, Kyoung Bae Jang, Hyun Ji Kim, Jae Hoon Park, Gyeung Ju Song, Min Joo Sim, Hwa Jeong Seo KIPS Transactions on Computer and Communication Systems,
Vol. 10, No. 8, pp. 223-230,
Aug.
2021
https://doi.org/10.3745/KTCCS.2021.10.8.223
Keywords: PIPO Block Cipher, 64-bit ARM Processor, Parallel Optimal Implementation
https://doi.org/10.3745/KTCCS.2021.10.8.223
Keywords: PIPO Block Cipher, 64-bit ARM Processor, Parallel Optimal Implementation
Design and Implementation of an InfiniBand System Interconnect for High-Performance Cluster Systems
Mo Sang Man , Park Gyeong , Kim Seong Nam , Kim Myeong Jun , Im Gi Ug The KIPS Transactions:PartA,
Vol. 10, No. 4, pp. 389-396,
Oct.
2003
10.3745/KIPSTA.2003.10.4.389
10.3745/KIPSTA.2003.10.4.389
Computer Graphics & Design of 1-D DCT processor using a new efficient computation sharing multiplier
Lee Tae Ug , Jo Sang Bog The KIPS Transactions:PartA,
Vol. 10, No. 4, pp. 347-356,
Oct.
2003
10.3745/KIPSTA.2003.10.4.347
10.3745/KIPSTA.2003.10.4.347
Theoretical Performance Bounds and Parallelization of a Two-Dimensional Packing Algorithm
In Jae Hwang , Dong Kweon Hong The KIPS Transactions:PartA,
Vol. 10, No. 1, pp. 43-48,
Mar.
2003
10.3745/KIPSTA.2003.10.1.43
10.3745/KIPSTA.2003.10.1.43
A Task Scheduling Scheme for Bus-Based Symmetric Multiprocessor Systems
Oh Han Kang , Si Gwan Kim The KIPS Transactions:PartA,
Vol. 9, No. 4, pp. 511-518,
Dec.
2002
10.3745/KIPSTA.2002.9.4.511
10.3745/KIPSTA.2002.9.4.511
A Framework of Configurable XML Processor for Flexible Embedding
Won Ho Chung , Mi Yeon Kang The KIPS Transactions:PartA,
Vol. 9, No. 4, pp. 467-478,
Dec.
2002
10.3745/KIPSTA.2002.9.4.467
10.3745/KIPSTA.2002.9.4.467