Computer Graphics & A Low Power Resource Allocation and Scheduling Algorithm for High Level Synthesis


The KIPS Transactions:PartA, Vol. 8, No. 3, pp. 279-286, Sep. 2001
10.3745/KIPSTA.2001.8.3.279,   PDF Download:

Abstract

This paper proposes a low power resource allocation and scheduling algorithm that minimized power consumption such as DSP circuit in high-level synthesis process. In this paper, we have used list-scheduling method for low power design in scheduling step. Also, it increase possibility to reuse input through resource sharing when assign resource. After scheduling, the resources allocation uses the power function in consideration of the result of calculating average hamming distances and switching activity between two input. First, it obtain switching activity about input value after calculate average hamming distances between two operator and find power value make use of bit pattern of the input value. Resource allocation process assign operator to minimize average hamming distance and power dissipation on all occasions which is allocated at each control step according to increase control step. As comparing the existed method, the execution time becomes fast according to number of operator and be most numerous control step. And in case of power that consume, there is decrease effect from 6% to 8% to be small.


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Cite this article
[IEEE Style]
M. K. Shin and C. H. Lin, "Computer Graphics & A Low Power Resource Allocation and Scheduling Algorithm for High Level Synthesis," The KIPS Transactions:PartA, vol. 8, no. 3, pp. 279-286, 2001. DOI: 10.3745/KIPSTA.2001.8.3.279.

[ACM Style]
Mu Kyoung Shin and Chi Ho Lin. 2001. Computer Graphics & A Low Power Resource Allocation and Scheduling Algorithm for High Level Synthesis. The KIPS Transactions:PartA, 8, 3, (2001), 279-286. DOI: 10.3745/KIPSTA.2001.8.3.279.