Efficient Regular Expression Matching Using FPGA


The KIPS Transactions:PartC, Vol. 16, No. 5, pp. 583-588, Oct. 2009
10.3745/KIPSTC.2009.16.5.583,   PDF Download:

Abstract

Network intrusion detection system (NIDS) monitors all incoming packets in the network and detects packets that are malicious to internal system. The NIDS should also have ability to update detection rules because new attack patterns are unpredictable. Incorporating FPGAs into the NIDS is one of the best solutions that can provide both high performance and high flexibility comparing with other approaches such as software solutions. In this paper we propose and design a novel approach, prefix sharing parallel pattern matcher, that can not only minimize additional resources but also maximize the processing performance. Experimental results showed that the throughput for 16-bit input is twice larger than for 8-bit input but the used LEs/Char in FPGA increases only 1.07 times.


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Cite this article
[IEEE Style]
J. H. Lee, S. W. Lee, N. S. Park, "Efficient Regular Expression Matching Using FPGA," The KIPS Transactions:PartC, vol. 16, no. 5, pp. 583-588, 2009. DOI: 10.3745/KIPSTC.2009.16.5.583.

[ACM Style]
Jang Haeng Lee, Seong Won Lee, and Neung Soo Park. 2009. Efficient Regular Expression Matching Using FPGA. The KIPS Transactions:PartC, 16, 5, (2009), 583-588. DOI: 10.3745/KIPSTC.2009.16.5.583.