The software architecture for the internal data processing in Gigabit IP Router


The KIPS Transactions:PartC, Vol. 10, No. 1, pp. 71-76, Feb. 2003
10.3745/KIPSTC.2003.10.1.71,   PDF Download:

Abstract

Internet traffic is getting tremendously heavier due to the exponential growth of the Internet users, the spread of the E-commerce and the network games. High-speed routers for fast packet forwarding are commercially available to satisfy the growing bandwidth. A high-speed router, which has the decentralized multiprocessing architecture for IP and routing functions, consists of host processors, line interfaces and switch fabrics. In this paper, we propose a software architecture tuned for high-speed non-forwarding packet manipulation. IPCMP (Inter-Processor Communication Message Protocol), which is a mechanism for IPC (Inter-Processor Communication), is also proposed and implemented as well. Proposed IPC mechanism results in faster packet-processing rate by 10% as compared to the conventional IPC mechanism using UDP/IP.


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Cite this article
[IEEE Style]
W. B. Lee, Y. S. Chung, T. I. Kim, Y. C. Bang, "The software architecture for the internal data processing in Gigabit IP Router," The KIPS Transactions:PartC, vol. 10, no. 1, pp. 71-76, 2003. DOI: 10.3745/KIPSTC.2003.10.1.71.

[ACM Style]
Wang Bong Lee, Yong Sik Chung, Tae Il Kim, and Young Cheol Bang. 2003. The software architecture for the internal data processing in Gigabit IP Router. The KIPS Transactions:PartC, 10, 1, (2003), 71-76. DOI: 10.3745/KIPSTC.2003.10.1.71.