A Study on Implementation of a VC - Merge Capable High - Speed Switch on MPLS over ATM


The KIPS Transactions:PartC, Vol. 9, No. 1, pp. 65-72, Feb. 2002
10.3745/KIPSTC.2002.9.1.65,   PDF Download:

Abstract

In this paper, we implement a high-speed switch with the function for label integration to enhance the expansion of networks using the label space of routers efficiently on MPLS over ATM networks. We propose an appropriate hardware structure to support the VC-merge function and differentiated services simultaneously. In this paper, we use the adaptive congestion control method such as EPD algorithm in case that there is a possibility of network congestion in output buffers of each core LSR. In addition, we justify the validity of the proposed VC-merge method through simulation and comparison to conventional Non VC-merge methods. The proposed VC-merge capable switch is modeled in VHDL, synthesized, and fabricated using the SAMSUNG 0.5um SOG process.


Statistics
Show / Hide Statistics

Statistics (Cumulative Counts from September 1st, 2017)
Multiple requests among the same browser session are counted as one view.
If you mouse over a chart, the values of data points will be shown.


Cite this article
[IEEE Style]
Y. C. Kim, T. W. Lee, D. W. Lee, "A Study on Implementation of a VC - Merge Capable High - Speed Switch on MPLS over ATM," The KIPS Transactions:PartC, vol. 9, no. 1, pp. 65-72, 2002. DOI: 10.3745/KIPSTC.2002.9.1.65.

[ACM Style]
Young Chul Kim, Tae Won Lee, and Dong Won Lee. 2002. A Study on Implementation of a VC - Merge Capable High - Speed Switch on MPLS over ATM. The KIPS Transactions:PartC, 9, 1, (2002), 65-72. DOI: 10.3745/KIPSTC.2002.9.1.65.