A Design and Implementation of a Timing Analysis Simulator for a Design Space Exploration on a Hybrid Embedded System
The KIPS Transactions:PartA, Vol. 9, No. 4, pp. 459-466, Dec. 2002
10.3745/KIPSTA.2002.9.4.459, PDF Download:
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Cite this article
[IEEE Style]
S. Y. Ahn, J. H. Shim, J. A. Lee, "A Design and Implementation of a Timing Analysis Simulator for a Design Space Exploration on a Hybrid Embedded System," The KIPS Transactions:PartA, vol. 9, no. 4, pp. 459-466, 2002. DOI: 10.3745/KIPSTA.2002.9.4.459.
[ACM Style]
Seong Yong Ahn, Jea Hong Shim, and Jeong A Lee. 2002. A Design and Implementation of a Timing Analysis Simulator for a Design Space Exploration on a Hybrid Embedded System. The KIPS Transactions:PartA, 9, 4, (2002), 459-466. DOI: 10.3745/KIPSTA.2002.9.4.459.